CIISA 7: more sound piece musings

I think that capturing the process of designing the aforementioned synthesiser may be a more evocative and comedic work than actually utilising the finished synth. I also have my doubts as to whether I can engineer a working synth within the short time that I have available to me. This is a classic woe that I find myself experiencing when it comes to uni work. Setting myself big goals at the last minute and then struggling to fulfill them, thus creating subpar work that is not representitave of my abilities. This is an organisational issue, but I can work around it by being thoughtful and measured about the products that I intend to deliver. For example; this assignment I initially planned to create a synthesiser and perform a piece with it, and now I have backtracked to simply making a piece about making a synthesiser.

My concept is to hit record (on some stereo mic pair) only when I’m about to test some part of my circuit. This means that I’ll be capturing all of the tiny victories and the tiny problem solving moments and all of the disappointing moments where nothing works despite my contrived plans.

I then plan on splicing these all together to create a rollercoaster compilation of all of the mini victories and failures that occur when attemtping to construct a working circuit.

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